Tag Archives: iverilog

Weird Trickery: Compiling verilog VPI extension and unit-testing it using cmake/ctest

A few months ago I needed to write a VPI extension for verilog HDL and (just as I would normally do) I needed a proper buildsystem for that stuff. Unfortunately in terms of build/debug/test tools the folks doing ASIC are living… Well, not in the stone age, but in their own small isolated world and keep reinventing the wheel over and over again. OpenSource iverilog simulator didn’t go far away from the proprietary counterparts that tend to ditch commonly used in linux environments best practices.
Okay, now let’s stop bitching about the way things are and decide how to deal with that kind of stuff. In this note I’ll try to describe how to make a CMakeLists.txt for compiling a VPI extension and unit-testing it with ctest.

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