If you’re following my blog, you might’ve read my post about Dlink’s substandard engineering, and how I’ve got debian running on the damn thing. Well, since that time I’ve made a few improvements, namely:

  • Power button’s now correctly rigged as well as the rest of the buttons.
  • Upstream 3.18, 3.19 kernels now works flawlessly and don’t ever freeze. I update kernels with each new kernel release
  • Goodies like Marvell’s DMA engine, mv_xor, watchdog and mv_cesa are all enabled for the win and are working awesomely
  • There’s now a huge guide about ‘cooking’ the damned thing into a useable state in five easy steps. And you are reading it.
  • Power measurements are all there as well!

BIG FAT WARNING: I take no whatsoever responsibility if you screw up your device following these instructions. Proceed at your own risk, use your own head. This will also void warranty, btw.

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Since I’ve got some homebrew development boards ready, it’s time to get hacking.
I stocked on coffee and gave esp8266 SDK a deep dive this weekend. The code is really weird, lots of things are unknown, API is shitty, blobs all around the place. First of all, to make things clear – I’m not going to fix or do anything with AT-command firmware. It sucks. Period. Sucks so much it can’t even prove useful as a reference most of the times. So… we need a replacement.

This is what I’m working on and that is now, after a weekend of hacking is in early alpha stage.

Say hello to Frankenstein Firmware for ESP8266.

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As you might have seen, I’ve made a few projects with PL2303HX, namely that little nifty esp8266 developer board. I plan to dive in esp8266 firmware development soon and my goal will be a nifty mysql client, so that I can run mysql queries via UART! The only bad thing (apart from eeprom never working, and occasional freezes that I’ve later fixed with a 10uF SMD capacitor) – I had to press the buttons to reset the ESP8266 module to bootloader mode. So I’ve made a ‘dark green evil sister’ twin of that red board with a little bit updated schematics:

  • GP0 and GP1 lines are now rigged to reset and bootloader buttons respectively, resistors protect those against logic level conflict.
  • I’ve ditched EEPROM. It doesn’t work anyway. Screw that!
  • Proper decoupling – no more freezes!
  • SMD LEDs on GP0 and GP1.
  • Nice dark greenish design and clear urethane coating FTW!

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ESP8266 took a hell of a time to arrive, so meanwhile I got a dev board ready. Nothing really too fancy inside – just a PL2303HX, a few LEDs, buttons and connectors… But I couldn’t resist making some nice artwork on the silkscreen:

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The board is made using my usual tech involving a color laserjet printer, toner transfer machine, and and some urethane coating for durability. Now, it’s high time to port antares to support esp8266 CPU!

TL;DR; Ported Debian on Dlink DNS-327L with fresh kernel, mybranch’s here‘е. Inside stock firmware there lies madness!

Now, the long read:

You might have noticed that my dull engineering blog has been lagging recently, occasionally throwing the nginx 500 error. That’s because of the ongoing cursed hardware adventures I’ve been having for the past 2 weeks.

But let’s start from the very beginning, and it will be a very long story. It all began with an HDD crashing in my RAID-1. Since the motherboard serving as the NAS storage box was pretty old and laggy, I decided I would get a nice and shiny small NAS box as well. The criteria was simple: cheap, supports nfs, small, RAID-1 supported.
So I picked Dlink DNS-327L and a spare HDD, I knew the box might be a Debian/OpenWRT target once the warranty’s void. Having dealt with some dlink hardware in the past (or, better to say, raising that hardware back from the dead) I ditched the stock power brick and used my own. I wanted to live on stock for a few months, just to make sure that no hardware is faulty…

Yep, I found use for that free sticker HaD sent me!

Yep, I found use for that sticker HaD sent me!

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As you might remember, buspirate is a pic24-based device with a pic24 + ft232 for usb connectivity. pic24 runs (according to datasheet) at clocks up to 32Mhz. The price tag for my bpv3 hardware was something around 30$ at places like seeedstudio.
uISP on the other hand is way cheaper and simpler and contains only an atmega8 + a handful of passive components. It’s less than 5$ worth of components (and board!) and was designed by me a very long time ago as a super-cheap ISP programmer/devboard. Something I can give out to students to get started in electronics.  uISP has NO HARDWARE USB. It just uses vusb stack. Yep, simple as that. The clock is 12Mhz on most boards and for this test I also made a super-special version with a 20Mhz crystal.

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Now, can this cute little thingie outperform a much faster buspirate with hardware serial interface IC? Turns out it can, after all!

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It was a busy month, but I finally managed to find a minute and update the rf24boot. Yes, the very thing that can push firmware updates via nRF24L01 wireless modules. Along is a regular bunch of updates to rf24 library in antares. One of the big news I finally took some 20 minutes and layed out a proper programming dongle. Since I didn’t have a cheap stm32 with usb around, and stm32f103ret6 looked like an overkill for this purpose this dongle still uses avr, vusb, but has a 16M (20M is possible as well) crystal. The lengthy changelog’s under the cut, but it’s big.

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It took me a very looong time get my lazy ass down to making this simple yet so needed thing. Every damned time I had to upgrade a router or unbrick something with SPI flash I told myself: time to get it done. Well, that time has finally come, besides I really wanted to try out that nice art on copper. (Azura from TES, but with a drill bit and a wrench. Awesome work of Vemarish)

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